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BEROULLE Vincent

Head of LCIS Laboratory, Professor at UGA/Grenoble INP- Esisar

Coordonnées

Grenoble INP - LCIS 50 rue B. de Laffemas CS10054 26902 VALENCE Cedex 9 FRANCE

  • Tél. : +33.(0)4.75.75.94.09
  • Fax : 0475435642

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TEACHING ACTIVITIES: Professor in Embedded System Security & Safety

Keywords: Digital Design, VHDL, FPGA, Functional Verification, Safety, Security

Responsible of the following courses:

  • Advanced Digital Architecture Design
  • Verification and Test of Secure Embedded Systems
  • Design of Analog and Mixed Systems


Head of the international master MISTRE Valence at Grenoble INP Esisar

Coordinator of EMNESS ERASMUS+ Cooperation Partnership Project "European Master Network On Embedded System Security and Safety"
Academic Partners: University of Stuttgart, University of Freiburg, University of Pireaus, University of Barcelona (UPC), Politechnico de Torino, Grenoble INP Phelma 

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RESEARCH ACTIVITIES: Security and Safety of Integrated Systems
Keywords
: Fault Modeling, Fault injection, FPGA Prototyping, Verification, Test
Applications: SoC, RFID, IoT, Critical Systems, ...

CURRENT PROJECTS:

  • POP Project (ANR funding): "Power-OFF attacks on PUF"
Academic Partners: MSE (leader), TIMA, LHC
  • ANACONDA Project LCIS co-head (AURA Region funding), "Automated Cybersecurity Analysis with non Intrusive tools"
Industrial Partners: Ponant technologies, Rtone, Esisar Academic Partner: TIMA (Paolo Maistri), Verimag (Marie-Laure Potet)
  • Safe-Air Project Coordinator (AURA Region funding): "Safety Evaluation of Aircraft Systems using Virtual Platforms"
Industrial Partners: Thales Valence, AEDvices consulting
Academic Partners: LCIS, TIMA, LHC 

PAST PROJECTS: 
  • Safe-RFID Project Coordinator (ANR funding): "Dependability and Security of RFID Systems"
Dependability improvement of RFID systems
Vulnerability analysis of RFID systems
RFID Systems Model for Fault Simulation
  • ANR LIESSE project "Laser-Induced fault Effects in Security-dedicated circuitS"
Industrial Partner: ST Microelectronics
Academic Partners: LIRMM, LCIS, TIMA, ENSME, ONERA  

CURRENT Ph.D. SUPERVISION:
  • Ihab ALASHAER, "Cross-layer Fault Analysis on Microprocessor Architecture", November 2020
  • Hiep Manh DO, "Design of Secure Tags using ECC", December 2019
  • Nikolaos Foivos POLYCHONOUS, "Supervisor Design for Critical Embedded Systems", December 2019
  • Amir ALI POUR, "Machine Learning for Modeling of PUF", October 2019

PREVIOUS Ph.D. SUPERVISION:


Full publication list

Activités / CV

Vincent Beroulle received an Engineer Degree from the National Polytechnical Institute of Grenoble (INPG) in 1996, and a Master Degree and a Ph.D in Microelectronics from the University of Montpellier II, respectively in 1999 and 2002. He is currently Professor at the Grenoble Institute of Technology. He is head of the LCIS laboratory. His main interest concerns security and safety of complex integrated circuits and systems. In particular, his work deals with fault modeling and fault injection with emulation platforms with a specific focus on IoT and RFID technologies. 

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mise à jour le 19 septembre 2022

LCIS
50, rue Barthélémy de Laffemas
BP54 26902 VALENCE Cedex 09 France
Tél : +33 (0)4 75 75 94 49  
 

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