Grenoble INP - LCIS 50 rue B. de Laffemas CS10054 26902 VALENCE Cedex 9 FRANCE
Site internet : http://lcis.grenoble-inp.fr/themes/vincent-beroulle-home-page
Key words: Digital Design, VHDL, FPGA, Functional Verification, Safety, Security
Key words: Security, Safety, FPGA Prototyping, Verification, Test, Fault Injection
Vincent Beroulle received an Engineer Degree from the National Polytechnical Institute of Grenoble (INPG) in 1996, and a Master Degree and a Ph.D in Microelectronics from the University of Montpellier II, respectively in 1999 and 2002. He is currently Professor at the Grenoble Institute of Technology. He is head of the LCIS laboratory. His main interest concerns security and safety of complex integrated circuits and systems. In particular, his work deals with fault modeling and fault injection with emulation platforms with a specific focus on IoT and RFID technologies.
mise à jour le 20 janvier 2022