Projets réalisés

Test et vérification de systèmes matériels-logiciels

• M. Youssef SERRESTOU, "Optimisation de la qualité de la vérification fonctionnelle par analyse de mutation", soutenue le 8 décembre 2008.

• M. Tu TRAN XUAN, thèse effectuée au CEA-LETI , "Méthode de test et conception en vue du test pour les réseaux sur puce asynchrones : application au réseau ANOC", soutenue le 12 février 2008.

Conception et test de systèmes mixtes (AMS)

• M. Rami Khouri,"Modélisation comportementale en VHDL-AMS du lien RF pour la simulation et l'optimisation des systèmes RFID UHF et micro-ondes",soutenue le 28 mai 2007.

• M. Yves JOANNON, CIFRE ST Microelectronics, « Qualification et  génération automatique de stimuli pour le test de systèmes sur puces (SoC) analogiques mixtes et RF ». soutenue le 11 avril 2008.

Matières enseignées à Grenoble INP - Esisar

Mots clefs : microélectronique, test, vérification, prototypage, VHDL/VHDL-AMS/SystemC

• Conception de circuits intégrés VLSI CMOS
• Conception d'architectures numériques complexes sur FPGA
  
• Conception de systèmes analogiques et mixtes
• Vérification et test des systèmes matériels-logiciels
• Conception conjointe matérielle-logicielle
  

Principales publications dans des revues scientifiques

G. Fritz, V. Beroulle, O. Aktouf, M. Nguyen, D. Hély, "RFID System On-line Testing Based on the Evaluation of the Tags Read-Error-Rate", Journal of Electronic Testing, DOI: 10.1007/s10836-010-5191-6, Décembre 2010

X.T. Tran, Y. Thonnart, J. Durupt, V. Beroulle, C. Robach, "Design-for-Test Approach of an Asynchronous Network-on-Chip Architecture and its Associated Test Pattern Generation and Application", IET Journal on Computers and Digital Techniques, Volume 3, Issue 5,pp. 487-500, DOI:10.1049/iet-cdt.2008.0072, September 2009

Y. Joannon, V. Beroulle, J.-L. Carbonéro, S. Tedjini, C. Robach, "Choice of a high level fault model for the Optimization of Validation Test Set reused for Manufacturing Test", VLSI Design, vol. 2008, Article ID 596146, 9 pages, DOI:10.1155/2008/596146, 2008

Y. Joannon, V. Beroulle, C. Robach, S. Tedjini, J.-L. Carbonero, "Decreasing Test Qualification Time of AMS&RF Systems by using Normal Estimation", IEEE Design and Test of Computer, Special Issue on Design and Test of RFIC Chips, Vol. 25, n°1, January/February 2008

R. Khouri, V. Beroulle, T.P. Vuong, S. Tedjini, "UHF RFID tag-antenna matching optimization using VHDL-AMS behavioral modeling", Analog Integrated Circuits and Signal Processing, Springer Netherlands, Volume 50, Number 2 / February, 2007, ISSN : 0925-1030, pp. 81-162, Friday, December 22, 2006

L. Latorre, V. Beroulle, P. Nouet, "Design of CMOS MEMS Based on Mechanical Resonators Using a RF Simulation Approach", Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on  ,Volume: 23 , Issue: 6, pp. 962 - 967, June 2004

V. Beroulle, Y. Bertrand, L. Latorre, P. Nouet, "Monolithic Piezoresistive CMOS Magnetic Field Sensors", Sensors & Actuators A, n°3538, Elsevier Science, PII: S0924-4247(02)00317-52002 pp. 1-10, 2003

V. Beroulle, Y. Bertrand, L. Latorre, P. Nouet, « Test and Testability of a Monolithic MEMS for Magnetic Field Sensing », Journal of Electronic Testing: Theory and Applications, Vol. 17, Issue 5, pp. 439-450, Octobre 2001

Principaux articles de conférences

Gilles Fritz, Vincent Beroulle, Oum-El-Kheir Aktouf, David Hély, Evaluation of a new RFID system performance monitoring approach, Design, Automation & Test in Europe, (DATE 2012), interactive presentation, Dresden, Gremany, 12-16 march 2012, to be published

Gilles Fritz, Vincent Beroulle, Oum-El-Kheir Aktouf, David Hély, "SystemC Modeling of RFID Systems for Robustness Analysis", 19th International Conference on Software, Telecommunications and Computer Networks IEEE SoftCOM 2011Split - Hvar - Dubrovnik, September 15 - 17, 2011, IEEE Catalog Number: CFP1187A-CDR; ISBN 978-953-290-027-9

Gilles Fritz, Boutheina Maaloul, Vincent Beroulle, Oum-El-Kheir Aktouf, David Hély, "Read rate profile monitoring for defect detection in RFID Systems", IEEE International Conference on RFID Technologies and Applications (RFID-TA 2011), , pp. 89-94, Sitges, Barcelona, Spain, on September 15-16, 2011, IEEE catalog number: CFP11RFT-CDR ; ISBN: 978-1-4577-0026-2 C5-16, 2011 IEEE catalog number: CFP11RFT-CDR ; ISBN: 978-1-4577-0026-2

Minh-Duc Nguyen, Gilles Fritz, Oum-El-Kheir Aktouf, Vincent Beroulle, David Hély, "Towards middleware-based fault tolerance in RFID systems", Proc. Of the 13th European Workshop on Dependable Computing, EWDC 2011, pp 49-52, Pisa, Italy, 11-12 May 2011

David Hély, Vincent Beroulle, Feng Lu, José Ramon Oya Garcia, "Towards an unified IP verification and robustness analysis platform", Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2011, Cottbus, Germany, 13-15 April 2011

G. Fritz, V. Beroulle, M.D Nguyen, O. Aktouf, I. Parissis, "Read-Error-Rate evaluation for RFID system on-line testing", PROCEEDINGS OF THE 2010 IEEE 16th International Mixed-Signals, Sensors and Systems Test Workshop (IMS3TW); Montpellier - La Grande Motte, France, June 7-9, 2010; IEEE Catalog Number: CFP10MST-USB ISBN: 978-1-4244-7791-3

X-T. Tran, Y. Thonnart, J. Durupt, V. Beroulle, C. Robach, « A Design-for-Test Implementation of an Asynchronous Network-on-Chip Architecture and its Associated Test Pattern Generation and Application. », The 2nd ACM/IEEE International Symposium on Networks-on-Chip, NOCS 2008, Newcastle University,  pp. 149-158, 7th-11th April 2008